1. Field of the Invention
The present invention relates to a cyclic type digital-to-analog (D/A) converter having an error detection and correction system.
2. Description of the Related Art
The conversion of a digital code to an analog value is usual in the field of information processing systems and, in general, a D/A converter must be capable of a high conversion speed, high resolution, satisfactory differential linearity, and low power consumption. D/A converters employing, for example, an R-2R ladder type conversion method or a 2.sup.n weighting type conversion method are known, and in these types of converters, the conversion circuit comprises many resistors or capacitors having weighted values. Accordingly, the requirements referred to the above are considerably effected by the precision of the resistance and capacitance values forming the D/A converter, and errors in these values must be quickly detected and quickly corrected to realize the desired high speed and precise D/A conversion.